1. Field
The following description relates to Hardware Description Language (HDL) required for developing embedded software (SW); and, more particularly, to Hardware Component Modeling Language (HCML) for efficiently structuring a hardware profile as a method that simultaneously develops heterogeneous embedded systems.
2. Description of the Related Art
Meta Object Facility (MOF) is a meta object management technique suggested by the Object Management Group (OMG). The MOF is represented through Unified Modeling Language (UML) and a meta-model of the UML is defined through the MOF. The MOF has a 4-layer metadata architecture. The layers are classified into an information layer, a model layer, a meta-model layer, and a meta-meta-model layer. The information layer includes clean data, which are desired to be described. The model layer includes metadata for describing data included in the information layer. The meta-model layer includes a description for defining architecture and a meaning of the metadata, i.e., meta metadata. The meta-model is an “abstract language” for describing different types of data. That is, the meta-model is a language without a specific grammar or mark. The meta meta-model layer includes description of the meaning and the architecture of the meta metadata. The meta meta-model layer is an “abstract language” for defining different types of metadata.
FIG. 1 shows a typical 4-layer meta modeling framework.
The RecordTypes meta-model may describe a lot of record types in a model level in the same manner as that a StockQuote type describes a lot of StockQuote instances in an information level in FIG. 1. Likewise, the meta-meta-model level may describe a lot of different meta-models n the meta model.
The typical 4-layer metadata architecture has many advantages in comparison with a simple modeling method. If the framework is well defined and designed, it is possible to support any types of model expected to be embodied and a modeling paradigm, allow different types of related metadata, allow an increasingly added meta-model and a new type of metadata, and support an exchange between a group using the meta-meta-model such as the meta-metadata (meta-model) and a predetermined metadata(model). In conclusion, since the meta-models may be standardized through the MOF, transformation between diverse models is possible.
Hardware Description Language (HDL) such as Verilog and VHSIC Hardware Description Language (VHDL) may be efficiently used for designing and simulating hardware but may not be properly applied to a complicated data process function or a system level designing. In particular, when a processor core such as System-on-a-Chip (SoC) is embedded and a very complicated function is embodied as a semiconductor chip, it is difficult to design only with a conventional hardware description language.
VHSIC Hardware Description Language (VHDL) is a hardware description language used for design automation of a digital circuit. The VHDL allows a broad range of design. The VHDL includes a behavioral description of a system level at an upper level and a gate level at a lower level. That is, the VHDL allows behavioral description, Register Transfer Level (RTL) description and gate level description. However, since the language for describing a VHDL hardware chip is complicated itself, it requires a lot of time and efforts for a general software developer to understand and easily use the language. The VHDL has an architecture, which is difficult to be understood. Since the object of the VHDL is to design a chip, there is a problem that a hardware control method cannot be described.
Since embedded software (SW) is subordinated to hardware, there is a problem that redesigning is needed whenever hardware is changed. Model Driven Development (MDD) is applied in existing studies for improving reusability of the embedded software. The MDD is a technique for developing a generally reusable hardware independent model and automatically creating the model as a hardware specification model based on pre-defined hardware profile information.
A hardware profile stores information required for developing the embedded software. The hardware profile should include information for connecting each of hardware components as well as detailed information on which hardware device a memory address and a CPU pin is connectable to, and which register any value should be input into in order to control each of hardware. Therefore, the hardware profile plays a very important role in developing MDD-based embedded software. A modeling/specification language for efficiently representing and defining hardware profile information is not developed yet. Accordingly, development of a hardware profile modeling/specification language is required prior to efficient reuse of the embedded software.
Unified Modeling Language (UML) as an integrated modeling language is widely used for specification and designing of the embedded software. Accordingly, if hardware profile information is defined using UML techniques, a hardware independent model developed using the UML may be transformed into a hardware specification model more efficiently.
Since a methodology for developing Model Driven Development (MDD)-based software allows independent software development in hardware change, studies for applying the methodology to embedded software (SW) development has been actively progressed. Information of hardware to be used is required to maintain a profile format in order to develop MDD-based embedded software. A language for efficiently defining a hardware profile is also needed.
Conventionally, there is a Hardware Description Language (HDL) including Verilog or VHSIC Hardware Description Language (VHDL) as a language for defining a hardware profile. The Hardware Description Language (HDL) may be efficiently used for designing and simulating hardware but may not be properly applied to a complicated data process function or a system level designing. In particular, when a processor core such as System-on-a-Chip (SoC) is embedded and a very complicated function is embodied as a semiconductor chip, it is difficult to design only with a conventional hardware description language. Since a language for describing a VHDL hardware chip is complicated itself, it requires a lot of time and efforts for a general software developer to understand and easily use the language. The VHDL has an architecture, which is difficult to be understood. Since the object of the VHDL is to design a chip, there is a problem that a hardware control method cannot be described.